UD
2 weeks ago
I successfully created a simple RISC-V CPU in verilog.


https://images.plurk.com/2cQ0PbijgLxJWxcQ2CF4td.png

https://training.linuxfo...

LinuxFoundationX LFD111x Certificate | edX
latest #7
UD
2 weeks ago
I work with software every day, but I want to find something else to explore. I feel like SystemVerilog is the connection, like a cable, that helps create the logic.
UD
2 weeks ago
UD
2 weeks ago
I have been trying to read English every day for the past month.
I feel like my English reading skills are improving.
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UD
2 weeks ago
Just like in programming, consistently doing something will eventually lead to improvement.
UD
2 weeks ago
The next step is to start thinking in English.
UD
2 weeks ago
好爽喔,感覺就像是玩了一個複雜的小品遊戲、密室逃脫
UD
2 weeks ago
靜下心來真的可以完成挑戰
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